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97 | Shumran & Al-Hussein
Fig. 18. Block diagram of proposed audio encryption,
adopted from [43].
different configurations, and two different dimensions. The Fig. 19. The overall diagram of speech secure
required condition for achieving and implementing the sug- communication, adopted from [44].
gested synchronization scheme has been determined. The
effectiveness of the suggested synchronization scheme has In 2021, Abdullah Ali. [47],Suggested a fractional-order
been demonstrated using two different systems: the three- chaotic cryptosystem running on gear specific to the applica-
dimensional fractional order reverse butterfly-shaped chaotic tion, such as FPGA or DSP development boards. Fractional-
system and the four-dimensional fractional order hyper chaos order chaotic structures are valuable in data-secure commu-
Lorenz system. nication because the security space key raises the fractional-
order parameters and improves security. Further enhancing
E. Chaotic Systems Based on Fractional-order Calculus the level of communication security is the planned use of
The subsequent section will examine additional techniques discrete time fractional-order chaotic schemes for the digital
that rely on the fractional order system. Fractional orders, or speech signal scrambling. In 2019, Zahraa M. Alroubaie, et
additional degrees of freedom, are introduced into the system al. [48], it is suggested using synchronized fixed-point chaotic
by fractional calculus. This improves the system’s controlla- map-based stream ciphers (SFPCM-SC) for speech encryption.
bility and increases its resistance to hacking. The pseudo-random bit generator (PRBG) is created using
a fixed-point converter after five chaotic maps—quadratic,
In 2020, Abdulaziz H. Elsafty, et al. [46], presents a study henon, logistic, Lozi, and duffing—are synchronized using
investigating how the behavior of a chaotic system is affected the master-slave synchronization technique. After creating the
by the use of various floating-point representations. Further- encrypted signal, the digital speech signal is XORed with the
more, it provides an analysis of the attractors in three distinct PRBG. The original speech signal is recovered on the other
orders: fractional, mixed-order, and integer. This comparison side by synchronizing the same map with the master map. Xil-
illustrates how few bits are required in each case, for all pa- inx System Generator (XSG) is used to build the design and
rameters, to simulate the chaotic attractor. MATLAB-based MATLAB is used to simulate the work initially. The FPGA
numerical simulations for every chaotic system under discus- SP605 XC6SLX45T device is used to implement hardware
sion are provided. A hardware implementation for FPGA is co-simulation for the proposed system.the general equations
suggested for all new Wang chaotic systems, including frac- of master chaotic maps are given as follows in system (7),
tional, mixed-order, and integer ones. They are implemented and the master system is the chaotic system on the transmitter
on the Xilinx Vertix-5 FPGA kit using the Verilog hardware side [48]:
description language and simulated by Xilinx ISE 14.7.
Xi + 1 = f (Xi,Yi)
Yi + 1 = g(Xi,Yi) (7)
