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94 | Shumran & Al-Hussein
C. Encryption Methods Depending on Method of Realiza-
tions:
1) The Field Programmable Gates Array (FPGA)
The Field Programmability Gates Array (FPGA) is a tech-
nique used for analog and digital implementation and it has
become one of the most digital implementations ever, used
with a different application to achieve high speed and low cost
with a short time to mark the features [32, 33].
In 2023, Mohamad Afendee Mohamed et al [34], proposed Fig. 14. The signal plots for the proposed 3-D chaotic system.
a novel chaotic dynamic system in three dimensions with an
equilibrium curve shaped like a capsule. Because the proposed 3 single board computer; and (iii) a voice recognition chip
chaotic system has an infinite number of equilibrium points, manufactured by Sun plus.a chaotic pseudo-random binary
it is noted that it has a hidden attractor. Additionally, it is generator whose decimal numerical values are converted to an
proven that for the same parameter values but different initial 8-bit binary scale under the VHDL description of mod(255).
states, the suggested chaotic system displays multi-stability A block diagram of the hardware components used to build up
with two coexisting chaotic attractors. The suggested speech the primary control subsystem and the procedures pertaining
cryptosystem is put into practice using an FPGA (Field Pro- to the encryption and decryption of digital pictures is pre-
grammable Gate Array) platform. According to experimental sented in fig.15. The access authorization and XOR encrypter
findings, the suggested encryption scheme uses 33% of the are two sub-entities that work with the FPGA to establish con-
FPGA, with a maximum clock frequency of 178.28 MHz. trol over the operations. Additionally, it displays the CPRBG
A six-term chaotic dynamical system in three dimensions entity, which is in charge of producing binary chaotic states
given by (6) [34],: in relation to a chosen mapping. Through the UART 1 and
UART 2 communication ports, the primary control subsystem
?? = ? (6) simultaneously maintains communication in parallel with the
?? = -? (a? + ß ?2 + ? ? ) capture, display, and recognition subsystems. Five algorithms
?? = ? 4 - (0.1? 2?2) + ?2 - 0.5 govern how the whole system operates.
In the system (6),as shown in Fig. 14. the state is designated
by the three dimensional vector k = (? , ? , ?) noteworthy, the
dynamics (6) consists of six nonlinear terms. It is assume that
all system constantsa,and ß , are positive.
In 2018, Munawar A. Riyadi et al [36], proposed Using
Spartan-3 FPGA boards and a chaotic cryptography algorithm,
a secure voice channel prototype with cipher feedback mode
has been implemented. Lastly, the Spartan-3 FPGA provides
options for additional voice channel security because it can
process chaotic cryptography algorithms for data at audio fre-
quencies.
In 2018, Eduardo Rodr´iguez-Orozco et al. [35], proposed In 2021, Fethi Dridi et al. [37], researchers assessed the
a cryptosystem consisting of three technologies: (i) a Spar- hardware implementation performance in terms of computa-
tan 3E-1600 FPGA from Xilinx; (ii) a 64-bit Raspberry Pi tional complexity and security on an FPGA board that was de-
signed as a secure chaos-based stream cipher (SCbSC) using
VHDL. The suggested secure pseudo-chaotic number genera-
tor (SPCNG) is the core component of the system. The sug-
gested SPCNG’s architecture consists of three first-order recur-
sive filters, each of which has an internal pseudo-random num-
