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Algorithm 1 PCPG and DVFS Based WLC Metrics.
Input: power, performance counter readings including (unhalted
CPU cycles, memory access, instruction retired);
Input: Parameters: urrH =0.11, nnmipcH =0.35, nnmipcL=0.25;
Output: WLC type, PCPG, and DVFS;
Compute: urr, and nnmipc;
1: If: urr = urrH ;
2: WLC type = LA; -?(Class 0: Low-Activity)
3: Allocated single LITTLE core;
4: DVFS fA7=Min.;
5: Else if: nnmipc > nnmipcH ;
6: WLC type = CI; -? (Class1: CPU-intensive)
7: Allocated cores A15 cores alone;
8: DVFS fA15=Max.;
9: Else if: nnmipcL < nnmipc < nnmipcH ;
10: WLC type = Mixed; -?(Class2: Combination)
11: Allocated cores big. LITTLE cores;
12: DVFS fA15=Max. & fA7= Max.;
13: Else if: nnmipc < nnmipcL;
14: WLC type = MI; -? (Class3: memory intensive)
15: Allocated cores A7 cores alone;
16: DVFS fA7=Max.;
17: end if;
the advantages of switching off the big cores which causing
the highest dark silicon related power consumption. These re-
sults illustrate about 110% improvements of energy-efficiency
(IPS/Watt) over the ondemand governor, while improvement
of 37% has been reported in comparison to WLC+MLR ap-
proach published in [11].
Exercising of cannel, CPU-intensive application, using our
proposed approach can achieve 10 to 100% improvement over
the WLC+MLR and ondemand governor, respectively. Mixed
memory and CPU-intensive concurrent application shows
slighter energy efficiency improvements of 12 to 2% for can-
nel+Bodytrack and cannel+streamcluster respectively. This is
attributed to the fact that application behavior fluctuated from computing, making it a fundamental driver for a more sustain-
one class to another causing of high energy consumption in
the power switch network which outweigh its energy saving
at some interval of exercising the application. Therefore, our
proposed approach can achieve significant energy saving on
minor fluctuated application, which rarely move from one
class to other.
VII. CONCLUSIONS
Emerging of heterogamous many-core platform offers promis-
ing solution for ever increasing demands of energy-efficient
mobile computing system. Using power gating technique
based workload classification coupled with core allocation
and DVFS, these platforms can effectively minimize energy
consumption and optimize resource utilization. Thereby, con-
Alrudainy, Marzook, Hussein & Shafik
6
× 109
Energy efficiency (IPS/Watt)
5
4
3
2
1
0
Ondemand governer WLC+DVFS [15] Proposed PCPG based
WLC +DVFS
Fig. 4. IPS/Watt measured for the proposed PCPG based
WLC, MLR+WLC, and only ondemand governor exercised
on odroid XU3 platform.
tributing to significantly mitigate dark silicon effect occurring
due to an implementing of Moore’s Law technology scal-
ing. In this work, IPS/Watt has been improved 37 to 110%
for memory intensive workload compared to published work
in [11], and ondemand governor, respectively.
In conclusion, the combination of heterogeneous many-
core platform and workload classification plays substantial
role in revolutionize the way we approach energy-efficient
able and powerful future in the world of computing technology.
For future work, PCPG based WLC can be implemented on
GPU to drastically reduce energy consumption, hence signifi-
cant energy saving can be improved.
CONFLICT OF INTEREST
The authors have no conflict of relevant interest to this article
can be used.
REFERENCES
[1] H. Esmaeilzadeh, E. Blem, R. St. Amant, K. Sankar-
alingam, and D. Burger, “Dark silicon and the end
of multicore scaling,” in Proceedings of the 38th an-
nual international symposium on Computer architecture,
pp. 365–376, 2011.