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Al-Jrew, Mahmood & Ali | 49
inverter was the need for many separate DC sources to and various modulation indexes. Even though the two
supply the inverter. topologies required fewer number of switches, the drawback
is the needed to separated DC voltage supplies which
In (2014), R. Nagarajan and M. Saravanan developed a 9 increase the inverters cost.
level cascaded multilevel inverter with reduced switching
components, carrier signals and gate drivers. It included In (2020), V. Anand and V. Singh created a modular
hybrid structure of two portions, the first one generate the inverter with a basic unit that can be extended in series to
level voltage using high-frequency switches. The other part achieve the required output level voltage. The designed basic
generate the polarity of the output voltage using low unit consisted of four bidirectional and unidirectional
frequency switches. That topology required eleven switches switches, and two DC sources. To create a symmetrical 7-
and four separated sources are required. The findings clearly level inverter, nine unidirectional and bidirectional switches,
indicated that the suggested architecture might function as a and three DC voltage sources are required. Using the same
multilayer inverter with fewer switches and carriers [7]. components, it can be generates 15 level with asymmetrical
DC voltage sources. When two basic unit connected in
In (2015), N. Prabaharan and K. Palanisamy investigated series, a maximum of 27 level were formed. Comparison had
15 level inverter with asymmetric DC source and different been made for the developed inverter using five algorithms
types of multicarrier PWM signals. Comparison had been for asymmetrical multilevel inverter in term of the number
done among the suggested reduced switches topology and of DC sources, stresses on each switch and efficiency. As a
the classical topologies (Diode clamped, Flying Capacitor result, the developed modular inverter employed fewer ON-
and Cascade H-Bridge). The suggested configuration state switches and has a lower block voltage across switches.
consisted of eight switches (two of them were connecting The drawback of that configuration is that the efficiency
with DC sources), that arrangement had been utilized to decreases as the over and under modulation as RMS as well
double the output level of voltage based on the values of DC as THD both increases [12].
sources [8].
In (2021), M. S. Bin Arif et al. suggested basic module
V. Rajkumar and T. Nadu introduced a model of a 21- which operated with symmetrical and asymmetrical DC
asymmetric cascade MLI with a lower number of switches. sources using nearest level control technique. It can generate
The inverter used in that study employs just 11 switches, 3 15 level at the output with eight switches, and 4 DC sources
diodes, and 4 asymmetrical sources with multicarrier PWM and it can be generalized to generate more number of levels.
to generate the required output voltage. For the reverse When compared with the basic topology, which requires ten
current flow problem, anti-parallel diodes utilized, allowing switches to produce the same output level voltage. Analysis
several levels to be achieved at the outputs. The simulation reveals that the suggested system required lower rated
shows that even if one of the switches fails, the system can switches and overall block voltage. The findings were
still produce numerous voltage levels without shunting down achieved for unity power factor loads, as well as with
the entire system. The used topology in this study employs a changing modulation index. The results show that with the
lower number of power semiconductor components and increasing in output power rating, the efficiency of the
minimizes overall cost [9]. designed 15-level inverter reduced [13].
A. I. M. Ali et al. created an arrangement for a single- B. Hosseini Montazer, J. Olamaei, M. Hosseinpour, and
phase, five-level inverter with load voltage control via PWM B. Mozafari, introduced the bidirectional MLI topology to
in (2018).The basic construction of that inverter consists of feed low power factor RL loads with symmetrical and
two parts. The first one is a full H-bridge inverter, which is asymmetrical DC sources. In the symmetric topology, the
responsible for the polarity of the output voltage. The second suggested unit includes 5 separate DC sources with 9
part (consisting of two cells) is responsible for adjusting the unidirectional switches, 2 bidirectional switches, and 2
output level of voltage. The two cells connected in series. diodes that may yield 11 levels, while the conventional
The first one contains a single DC-source in series with a architectures require 12 switches or more to create 11 levels
switch, and this series combination connected in parallel at the output. The asymmetric topology generates 19 levels
with the diode, while the second one consists only of a DC in the output using the same components. The problem of
source. A PI controller utilized in a closed loop circuit to reverse current and voltage spikes had been studied. The
manage and regulate sinusoidal load voltage. Even though suggested topology analysis has been validated by the
the developed arrangement used fewer switches and lower experimental laboratory results [14].
harmonic content, the experimental results show lower
efficiency than expected [10]. In (2021), A. Abdali, A. Abdulabbas, and H. Nekad
conducted a comparison between conventional and non-
In a separate study [11], two topologies for multilevel conventional topologies. The non-conventional topologies
output voltage inverters were presented. The first used in the study were 3-phase 9 and 17 output voltage
configuration synthesizes (15 levels) at the output. It levels. The 9-levels topology required (11 switches/ phase)
consisted of three DC voltage sources and ten and 4 DC sources, while the 17-levels topology required (32
unidirectional and bidirectional switches. The second switches/phase) and 8 DC sources. The developed topologies
configuration consisted of four DC voltage sources and 12 require fewer switches to produce the same output voltage
switches to create 25 levels at the output, which is an level using the conventional topologies and can be extended
expansion of the first topology. Both topologies to produce a high number of levels [15].
implemented with lower voltage rated across the switches.
The experimental findings demonstrate the feasibility of
these topologies with various types of loading combinations