Iraqi Journal for Electrical and Electronic Engineering
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Search Results for pv-array

Article
Two Elements Elliptical Slot CDRA Array with Corporate Feeding For X-Band Applications

Abdulkareem S. Abdullah, Asmaa H. Majeed, Khalil H. Sayidmarie, Raed A. Abd- Alhameed

Pages: 48-54

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Abstract

In this paper, a compact two-element cylindrical dielectric resonator antenna (CDRA) array with corporate feeding is proposed for X-band applications. The dielectric resonator antenna (DRA) array is excited by a microstrip feeder using an efficient aperture-coupled method. The designed array antenna is analyzed using a CST microwave studio. The fabricated sample of the proposed CDRA antenna array showed bandwidth extending from 10.42GHz to 12.84GHz (20.8%). The achieved array gain has a maximum of 9.29dB i at frequency of 10.7GHz. This is about 2.06dB i enhancement of the gain in comparison with a single pellet CDRA. The size of the whole antenna structure is about 50  50mm 2 .

Article
Design and Validation of Super-Capacitor Assisted Photovoltaic Array for Roof-Top Solar Powered Electric Vehicle Applications

Karunanithi K., S. Saravanan, Ramesh S., S. P. Raja, S. Kannan, S. C. Vijayakumar

Pages: 117-125

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Abstract

Upkeeping the Battery State-Of-Charge (SoC) and its life are of great significance in Battery Electric Vehicle (BEV) & Hybrid Electric Vehicles (HEV). This is possible by integrating Solar Photovoltaic Panels (PPs) on the Roof-top of the BEVs & HEVs. However, unlike Solar Powered Vehicle Charging stations and other PV applications where the solar panels are installed in such a way to extract the maximum Photon energy incident on the panel, vehicle Roof-top mount Solar PPs face many challenges in extracting maximum Power due to partial shading issues especially under dynamic conditions when passing under trees, high rise buildings and cloud passages. This paper proposes a new strategy called “Super-capacitor Assisted Photovoltaic Array”. In which Photovoltaic Modules are integrated with Super-capacitors to improve the transient performance of the Photovoltaic Array system. The design of proposed Super-capacitor Assisted PV array is validated & its performance is compared with conventional PV array in Matlab/ Simulink environment.

Article
The Beam Squint Effects in Antenna Arrays at Millimeter Bands

Mariam Q. Abdalrazak, Asmaa H. Majeed, Raed A. Abd-Alhameed

Pages: 16-22

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Abstract

Beam squint phenomenon is considered one of the most drawbacks that limit the use of (mm-waves) array antennas; which causes significant degradation in the BER of the system. In this paper, a uniform linear array (ULA) system is exemplified at millimeter (mm-waves) frequency bands to realize the effects of beam squint phenomena from different directions on an equivalent gain response to represent the channel performance in terms of bit error rate (BER). A simple QPSK passband signal model is developed and tested according to the proposed antenna array with beam squint. The computed results show that increasing the passband bandwidth and the number of antenna elements, have a significant degradation in BER at the receiver when the magnitude and phase errors caused by the beam squint at 26 GHz with various spectrum bandwidths.

Article
PLC-HMI BASED SIMULATION of PV CELL and ARRAY BEHAVIOR

Maytham Ali Fadhil, Jawad Radhi Mahmood

Pages: 130-137

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Abstract

This paper presents the PLC-HMI based simulation of electrical-based PV cell/array model in laboratory platform to give the opportunity to students and users who haven't clear knowledge to study PV cell and array behavior with respect to change of environment conditions and electrical parameters. This simulation process covers the cell models under ideal and non-ideal ones. In non-ideal one, the series resistance and the shunt resistance are covered.

Article
Optical Parallel Quaternary Signed Digit Multiplier For Large Scale Two-Dimensional Array Using Digit-Decomposition Plane Representation

Alaa A. W. Al-Saffar

Pages: 21-32

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Abstract

An optical parallel quaternary signed digit (QSD) two-dimensional array multiplier based on digit-decomposition (DDP) representation and duplication-shifting-superimposing algorithm is proposed in this paper. The multiplication operation is done in three steps; one for partial products generation and the other two steps perform accumulation to find the DDP planes of the final result array. QSD multiplication and addition rules are used to obtain a newly derived equations which are suitable for easy optical implementation using basic optical tools. Finally, simulation results are presented to validate the successful of the multiplication operation.

Article
Optical Parallel Scalable High Speed 2D Data Array TSD Adder

Sabah S. Alsheraidah, Alaa A. W. Al-Saffar, Mohmmed A. A. Al-Ebbady

Pages: 11-20

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Abstract

In this paper, optical scalable parallel and high-speed 2D data array adder for trinary signed-digit (TSD) number is proposed. The digit-decomposition-plane (DDP) coding method is used to represent the 2D TSD data arrays. The algorithm performs parallel TSD addition in constant time independent of the size of the TSD data arrays. The design describes methodology to involve two-step TSD adder. The TSD addition is expressed with several combination logic formulas that are newly derived. Optical implementation with classical optical elements is suggested for proposed TSD adder. Preliminary demonstration example is also described.

Article
Design and implementation of Smart Relay Based Two-axis Sun Tracking System

Dr. jawad Radhi Mahmood, Haider Muhammed

Pages: 64-68

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Abstract

Solar power is environment friendly power source, but it is characterized by being highly dependent on the irradiation level witch is function of the sun position in the sky. To overcome this situation and extract maximum power from the sun, the PV array must be kept nearly perpendicular to the sun during the daytime. In this paper, a smart relay based sun tracking system has been designed and implemented to keep the PV array perpendicular to the sun during the day hours.

Article
An Experimental Investigation on VSI-fed Induction Motor using Xilinx ZYNQ-7000 SoC Controller

Santosh Yadav Maddu, Nitin Ramesh Bhasme

Pages: 104-114

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Abstract

In medium voltage and high-power drive applications, pulse width modulation (PWM) techniques are widely used to achieve effective speed control of AC motors. In real-time, an industrial drive system requires reduced hardware complexity and low computation time. The reliability of the AC drive can be improved with the FPGA (field programmable gate array) hardware equipped with digital controllers. To improve the performance of AC drives, a new FPGA-based Wavect real-time prototype controller (Xilinx ZYNQ-7000 SoC) is used to verify the effectiveness of the controller. These advanced controllers are capable of reducing computation time and enhancing the drive performance in real- time applications. The comparative performance analysis is carried out for the most commonly used voltage source inverter (VSI)-based PWM techniques such as sinusoidal pulse width modulation (SPWM) and space vector pulse width modulation (SVPWM) for three-phase, two-level inverters. The comparative study shows the SVPWM technique utilizes DC bus voltage more effectively and produces less harmonic distortion in terms of higher output voltage, flexible control of output frequency, and reduced harmonic distortion at output voltage for motor control applications. The simulation and hardware results are verified and validated by using MATLAB/Simulink software and FPGA-based Wavect real-time controller respectively.

Article
Analog Programmable Circuit Implementation for Memristor

Fadhil Rahma Tahir, Saif Muneam Ramadhan

Pages: 1-9

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Abstract

In this work, a new flux controlled memristor circuit is presented. It provides a tool to emulate the pinched hysteresis loop. When driven the memristor by a bipolar periodic signal, the memristor exhibits a “pinched hysteresis loop” in the voltage-current plane and starting from some critical frequency, the hysteresis lobe area decreases monotonically as the excitation frequency increases, the pinched hysteresis loop shrinks to a single-valued function when the frequency tends to infinity. The design model numerically simulated and the physical implementation is achieved by using a field programmable analog array (FPAA). The circuit can be modeled and implemented with a changeable nonlinear function blocks and fixed main system blocks. The simplicity of the specific design method makes this proposed model be a very engaging option for the design of the memristor .

Article
A New Hardware Architecture for Fuzzy Logic System Acceleration

Aumalhuda Gani Abood, Mohammed A. Jodha, Majid A. Alwan

Pages: 188-197

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Abstract

In this work, a new architecture is designed for fuzzy logic system. The proposed architecture is implemented on field programed gate array (FPGA). The hardware designed fuzzy systemimproves the excution speed with very high speed up factor using low cost availble kits such as FPGA. The implementation of the proposed architecture uses very low amount of logic elements and logic array blocks as proven when implementing the proposed architucture on FPGA.

Article
Design and Implementation of Neuro-Fuzzy Controller Using FPGA for Sun Tracking System

Ammar A. Aldair, Adel A. Obed, Ali F. Halihal

Pages: 123-136

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Abstract

Nowadays, renewable energy is being used increasingly because of the global warming and destruction of the environment. Therefore, the studies are concentrating on gain of maximum power from this energy such as the solar energy. A sun tracker is device which rotates a photovoltaic (PV) panel to the sun to get the maximum power. Disturbances which are originated by passing the clouds are one of great challenges in design of the controller in addition to the losses power due to energy consumption in the motors and lifetime limitation of the sun tracker. In this paper, the neuro-fuzzy controller has been designed and implemented using Field Programmable Gate Array (FPGA) board for dual axis sun tracker based on optical sensors to orient the PV panel by two linear actuators. The experimental results reveal that proposed controller is more robust than fuzzy logic controller and proportional- integral (PI) controller since it has been trained offline using Matlab tool box to overcome those disturbances. The proposed controller can track the sun trajectory effectively, where the experimental results reveal that dual axis sun tracker power can collect 50.6% more daily power than fixed angle panel. Whilst one axis sun tracker power can collect 39.4 % more daily power than fixed angle panel. Hence, dual axis sun tracker can collect 8 % more daily power than one axis sun tracker .

Article
Chameleon Chaotic System-Based Audio Encryption Algorithm and FPGA Implementation

Alaa Shumran, Abdul-Basset A. Al-Hussein

Pages: 232-250

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Abstract

Audio encryption has gained popularity in a variety of fields including education, banking over the phone, military, and private audio conferences. Data encryption algorithms are necessary for processing and sending sensitive information in the context of secure speech conversations. In recent years, the importance of security in any communications system has increased. To transfer data securely, a variety of methods have been used. Chaotic system-based encryption is one of the most significant encryption methods used in the field of security. Chaos-based communication is a promising application of chaos theory and nonlinear dynamics. In this research, a chaotic algorithm for the new chaotic chameleon system was proposed, studied, and implemented. The chameleon chaotic system has been preferred to be employed because it has the property of changing from self-excited (SA) to hidden-attractor (HA) which increases the complexity of the system dynamics and gives strength to the encryption algorithm. A chaotic chameleon system is one in which, depending on the parameter values, the chaotic attractor alternates between being a hidden attractor and a self-excited attractor. This is an important feature, so it is preferable to use it in cryptography compared to other types of chaotic systems. This model was first implemented using a Field Programmable Gate Array (FPGA), which is the first time it has been implemented in practical applications. The chameleon system model was implemented using MATLAB Simulink and the Xilinx System Generator model. Self-excited, hidden, and coexisting attractors are shown in the proposed system. Vivado software was used to validate the designs, and Xilinx ZedBoard Zynq-7000 FPGA was used to implement them. The dynamic behavior of the proposed chaotic system was also studied and analysis methods, including phase portrait, bifurcation diagrams, and Lyapunov exponents. Assessing the quality of the suggested method by doing analyses of many quality measures, including correlation, differential signal-to-noise ratio (SNR), entropy, histogram analysis, and spectral density plot. The numerical analyses and simulation results demonstrate how well the suggested method performs in terms of security against different types of cryptographic assaults.

Article
Design of Optimal STSMC Method Based on FPGA to Track the Trajectory of 2-DOF Robot Manipulator

Atheel K. Abdul Zahra, Wasan A. Wali

Pages: 226-235

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Abstract

This article emphasizes on a strategy to design a Super Twisting Sliding Mode Control (STSMC) method. The proposed controller depends on the device of Field Programmable Gate Array (FPGA) for controlling the trajectory of robot manipulator. The gains of the suggested controller are optimized using Chaotic Particle Swarm Optimization (PSO) in MATLAB toolbox software and Simulink environment. Since the control systems speed has an influence on their stability requirements and performance, (FPGA) device is taken in consideration. The proposed control method based on FPGA is implemented using Xilinx block sets in the Simulink. Integrated Software Environment (ISE 14.7) and System Generator are employed to create the file of Bitstream which can be downloaded in the device of FPGA. The results show that the designed controller based of on the FPGA by using System Generator is completely verified the effectiveness of controlling the path tracking of the manipulator and high speed. Simulation results explain that the percentage improvement in the Means Square Error (MSEs) of using the STSMC based FPGA and tuned via Chaotic PSO when compared with the same proposed controller tuned with classical PSO are 17.32 % and 13.98 % for two different cases of trajectories respectively.

Article
Reduced Area and Low Power Implementation of FFT/IFFT Processor

Shefa A. Dawwd, Suha. M. Nori

Pages: 108-119

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Abstract

The Fast Fourier Transform (FFT) and Inverse FFT(IFFT) are used in most of the digital signal processing applications. Real time implementation of FFT/IFFT is required in many of these applications. In this paper, an FPGA reconfigurable fixed point implementation of FFT/IFFT is presented. A manually VHDL codes are written to model the proposed FFT/IFFT processor. Two CORDIC-based FFT/IFFT processors based on radix-2and radix-4 architecture are designed. They have one butterfly processing unit. An efficient In-place memory assignment and addressing for the shared memory of FFT/IFFT processors are proposed to reduce the complexity of memory scheme. With "in-place" strategy, the outputs of butterfly operation are stored back to the same memory location of the inputs. Because of using DIF FFT, the output was to be in reverse order. To solve this issue, we have re-use the block RAM that used for storing the input sample as reordering unit to reduce hardware cost of the proposed processor. The Spartan-3E FPGA of 500,000 gates is employed to synthesize and implement the proposed architecture. The CORDIC based processors can save 40% of power consumption as compared with Xilinx logic core architectures of system generator.

Article
An Efficient Mathematical Approach for an Indoor Robot Localization System

Israa Sabri A. AL-Forati, Abdulmuttalib Rashid, Fatemah Al-Assfor

Pages: 61-70

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Abstract

In a counterfeit clever control procedure, another productive methodology for an indoor robot localization framework is arranged. In this paper, a new mathematic calculation for the robot confinement framework utilizing light sensors is proposed. This procedure takes care of the issue of localization (position recognizing) when utilizing a grid of LEDs distributed uniformly in the environment, and a multi- portable robot outfitted with a multi-LDRs sensor and just two of them activate the visibility robot. The proposed method is utilized to assess the robot's situation by drawing two virtual circles for each two LDR sensors; one of them is valid and the other is disregarded according to several suggested equations. The midpoint of this circle is assumed to be the robot focus. The new framework is simulated on a domain with (n*n) LEDs exhibit. The simulation impact of this framework shows great execution in the localization procedure.

Article
Survey: Internet of Thing Using FPGA

Noor Kareem Jumaa

Pages: 38-45

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Abstract

Everything in its way to be computerized and most of the objects are coming to be smart in present days. Modern Internet of Thing (IoT) allows these objects to be on the network by using IoT platforms. IoT is a smart information society that consists of smart devices; these devices can communicate with each other without human's intervention. IoT systems require flexible platforms. Through the use of Field Programmable Gate Array (FPGA), IoT devices can interface with the outside world easily with low power consumption, low latency, and best determinism. FPGAs provide System on Chip (SoC) technique due to FPGAs scalability which enables the designer to implement and integrate large number of hardware clocks at single chip. FPGA can be deemed as a special purpose reprogrammable processor since it can process signals at its input pins, manipulate them, and give off signals on the output pins. In this paper, using FPGA for IoT is the limelight.

Article
Taguchi Method Based Node Performance Analysis of Generous TIT- for-TAT Cooperation of AD-HOC Networks

Noor Kareem Jumaa, Auday A.H. Mohamad, Abbas Muhammed Allawy, Ali A. Mohammed

Pages: 33-44

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Abstract

Ad-Hoc networks have an adaptive architecture, temporarily configured to provide communication between wireless devices that provide network nodes. Forwarding packets from the source node to the remote destination node may require intermediate cooperative nodes (relay nodes), which may act selfishly because they are power-constrained. The nodes should exhibit cooperation even when faced with occasional selfish or non-cooperative behaviour from other nodes. Several factors affect the behaviour of nodes; those factors are the number of packets required to redirect, power consumption per node, and power constraints per node. Power constraints per node and grade of generosity. This article is based on a dynamic collaboration strategy, specifically the Generous Tit-for-Tat (GTFT), and it aims to represent an Ad-Hoc network operating with the Generous Tit-for-Tat (GTFT) cooperation strategy, measure statistics for the data, and then analyze these statistics using the Taguchi method. The transfer speed and relay node performance both have an impact on the factors that shape the network conditions and are subject to analysis using the Taguchi Method (TM). The analyzed parameters are node throughput, the amount of relay requested packets produced by a node per number of relays requested packets taken by a node, and the amount of accepted relay requested by a node per amount of relay requested by a node. A Taguchi L9 orthogonal array was used to analyze node behaviour, and the results show that the effect parameters were number of packets, power consumption, power constraint of the node, and grade of generosity. The tested parameters influence node cooperation in the following sequence: number of packets required to redirect (N) (effects on behaviour with a percent of 6.8491), power consumption per node (C) (effects on behaviour with a percent of 0.7467), power constraints per node (P) (effects on behaviour with a percent of 0.6831), and grade of generosity (ε) (effects on behaviour with a percent of 0.4530). Taguchi experiments proved that the grade of generosity (GoG) is not the influencing factor where the highest productivity level is, while the number of packets per second required to redirect also has an impact on node behaviour.

Article
Control Strategy for a PV-BESS-SC Hybrid System in Islanded Microgrid

Ali Almousawi, Ammar A. Aldair

Pages: 1-11

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Abstract

In this paper, a control strategy for a combination PV-BESS-SC hybrid system in islanded microgrid with a DC load is designed and analyzed using a new topology. Although Battery Energy Storage System (BESS) is employed to keep the DC bus voltage stable; however, it has a high energy density and a low power density. On the other hand, the Supercapacitor (SC) has a low energy density but a high-power density. As a result, combining a BESS and an SC is more efficient for power density and high energy. Integrating the many sources is more complicated. In order to integrate the SC and BESS and deliver continuous power to the load, a control strategy is required. A novel method for controlling the bus voltage and energy management will be proposed in this paper. The main advantage of the proposed system is that throughout the operation, the State of Charging (SOC), BESS current, and SC voltage and current are all kept within predetermined ranges. Additionally, SC balances fast- changing power surges, while BESS balances slow-changing power surges. Therefore, it enhances the life span and minimizes the current strains on BESS. To track the Maximum Power Point (MPP) or restrict power from the PV panel to the load, a unidirectional boost converter is utilized. Two buck converters coupled in parallel with a boost converter are proposed to charge the hybrid BESS-SC. Another two boost converters are used to manage the discharge operation of the BESS-SC storage in order to reduce losses. The simulation results show that the proposed control technique for rapid changes in load demand and PV generation is effective. In addition, the proposed technique control strategy is compared with a traditional control strategy.

Article
FPGA Based Modified Fuzzy PID Controller for Pitch Angle of Bench-top Helicopter

Ammar A. Aldair

Pages: 12-24

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Abstract

Fuzzy PID controller design is still a complex task due to the involvement of a large number of parameters in defining the fuzzy rule base. To reduce the huge number of fuzzy rules required in the normal design for fuzzy PID controller, the fuzzy PID controller is represented as Proportional-Derivative Fuzzy (PDF) controller and Proportional-Integral Fuzzy (PIF) controller connected in parallel through a summer. The PIF controller design has been simplified by replacing the PIF controller by PDF controller with accumulating output. In this paper, the modified Fuzzy PID controller design for bench-top helicopter has been presented. The proposed Fuzzy PID controller has been described using Very High Speed Integrated Circuit Hardware Description Language (VHDL) and implemented using the Field Programmable Gate Array (FPGA) board. The bench-top helicopter has been used to test the proposed controller. The results have been compared with the conventional PID controller and Internal Model Control Tuned PID (IMC-PID) Controller. Simulation results show that the modified Fuzzy PID controller produces superior control performance than the other two controllers in handling the nonlinearity of the helicopter system. The output signal from the FPGA board is compared with the output of the modified Fuzzy PID controller to show that the FPGA board works like the Fuzzy PID controller. The result shows that the plant responses with the FPGA board are much similar to the plant responses when using simulation software based controller.

Article
Practical Implementation of an Indoor Robot Localization and Identification System using an Array of Anchor Nodes

Israa Sabri A. AL-Forati, Abdulmuttalib T. Rashid

Pages: 9-16

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Abstract

This paper proposes a low-cost Light Emitting Diodes (LED) system with a novel arrangement that allows an indoor multi- robot localization. The proposed system uses only a matrix of low-cost LED installed uniformly on the ground of an environment and low-cost Light Dependent Resistor (LDR), each equipped on bottom of the robot for detection. The matrix of LEDs which are driven by a modified binary search algorithm are used as active beacons. The robot localizes itself based on the signals it receives from a group of neighbor LEDs. The minimum bounded circle algorithm is used to draw a virtual circle from the information collected from the neighbor LEDs and the center of this circle represents the robot’s location. The propose system is practically implemented on an environment with (16*16) matrix of LEDs. The experimental results show good performance in the localization process.

Article
Design and Implementation Model for Linearization Sensor Characteristic by FPAA

Alaa Abdul Hussein Salman, Fadhil Rahma Tahir, Mofeed Turky Rashid

Pages: 165-173

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Abstract

Linearization sensors characteristics becomes very interest field for researchers due to the importance in enhance the system performance, measurement accuracy, system design simplicity (hardware and software), reduce system cost, ..etc. in this paper, two approaches has been introduced in order to linearize the sensor characteristics; first is signal condition circuit based on lock up table (LUT) which this method performed for linearize NTC sensor characteristic. Second is ratiometric measurement equation which this method performed for linearize LVDT sensor characteristic. The proposed methods has been simulated by MATLAB, and then implemented by using Anadigm AN221E04 Field Programmable Analog Array (FPAA) development kit which several experiments performed in order to improve the performance of these approaches.

Article
Robotics Path Planning Algorithms using Low-Cost IR Sensor

Israa Sabri A. AL-Forati, Abdulmuttalib T. Rashid

Pages: 44-52

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Abstract

A robot is a smart machine that can help people in their daily lives and keep everyone safe. the three general sequences to accomplish any robot task is mapping the environment, the localization, and the navigation (path planning with obstacle avoidance). Since the goal of the robot is to reach its target without colliding, the most important and challenging task of the mobile robot is the navigation. In this paper, the robot navigation problem is solved by proposed two algorithms using low-cost IR receiver sensors arranged as an array, and a robot has been equipped with one IR transmitter. Firstly, the shortest orientation algorithm is proposed, the robot direction is corrected at each step of movement depending on the angle calculation. secondly, an Active orientation algorithm is presented to solve the weakness in the preceding algorithm. A chain of the active sensors in the environment within the sensing range of the virtual path is activated to be scan through the robot movement. In each algorithm, the initial position of the robot is detected using the modified binary search algorithm, various stages are used to avoid obstacles through suitable equations focusing on finding the shortest and the safer path of the robot. Simulation results with multi-resolution environment explained the efficiency of the algorithms, they are compatible with the designed environment, it provides safe movements (without hitting obstacles) and a good system control performance. A Comparison table is also provided.

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