The June issue is now online! For electronic browsing click here |
| IJEEE welcomes scientifically and technically valid articles from all areas of electrical, electronic engineering, and computer science.
With a broad scope, the journal is meant to provide a unified and reputable outlet for rigorously peer-reviewed and well-conducted scientific research. See the full Aims & Scope here. As well as original articles, IJEEE publishes comprehensive review articles and short articles. The Iraqi Journal of Electrical and Electronic Engineering (IJEEE) is a peer-reviewed open access journal that undergoes a rigorous evaluation process and is freely accessible to the public. As of January 1, 2024, the publishing processing fee is set at 300,000 IQD (200 $). More details can be found here. |
Most Recent Articles
| Open Access | |
| Design Efficient Vedic-Multiplier for Floating-Point MAC Module | |
| Fatima Tariq Hussein, and Fatemah K. AL-Assfor | |
| Version of record online: 14 July 2024 | DOI: 10.37917/ijeee.20.2.15 | Full Text (PDF) | |
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Multiplication-accumulation (MAC) operation plays a crucial role in digital signal processing (DSP) applications, such as image convolution and filters, especially when performed on floating-point numbers to achieve high-level of accuracy. The performance of MAC module highly relies upon the performance of the multiplier utilized. This work offers a distinctive and efficient floating-point Vedic multiplier (VM) called adjusted-VM (AVM) to be utilized in MAC module to meet modern DSP demands. The proposed AVM is based on Urdhva-Tiryakbhyam-Sutra (UT-Sutra) approach and utilizes an enhanced design for the Brent-Kung carry-select adder (EBK-CSLA) to generate the final product. A (6*6)-bit AVM is designed first, then, it is extended to design (12*12)-bit AVM which in turns, utilized to design (24*24)-bit AVM. Moreover, the pipelining concept is used to optimize the speed of the offered (24*24)-bit AVM design. The proposed (24*24)-bit AVM can be used to achieve efficient multiplication for mantissa part in binary single-precision (BSP) floating-point MAC module. The proposed AVM architectures are modeled in VHDL, simulated, and synthesized by Xilinx-ISE14.7 tool using several FPGA families. The implementation results demonstrated a noticeable reduction in delay and area occupation by 33.16% and 42.42%, respectively compared with the most recent existing unpipelined design, and a reduction in delay of 44.78% compared with the existing pipelined design.| Open Access | |
| Design of High-Secure Digital/Optical Double Color Image Encryption Assisted by 9D Chaos and DnCNN | |
| Rusul Abdulridha Muttashar, and Raad Sami Fyath | |
| Version of record online: 3 July 2024 | DOI: 10.37917/ijeee.20.2.14 | Full Text (PDF) | |
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With the rapid development of multimedia technology, securing the transfer of images becomes an urgent matter. Therefore, designing a high-speed/secure system for color images is a real challenge. A nine-dimensional (9D) chaotic-based digital/optical encryption schem is proposed for double-color images in this paper. The scheme consists of cascaded digital and optical encryption parts. The nine chaotic sequences are grouped into three sets, where each set is responsible for encryption one of the RGB channels independently. One of them controls the fusion, XOR operation, and scrambling-based digital part. The other two sets are used for controlling the optical part by constructing two independent chaotic phase masks in the optical Fourier transforms domain. A denoising convolution neural network (DnCNN) is designed to enhance the robustness of the decrypted images against the Gaussian noise. The simulation results prove the robustness of the proposed scheme as the entropy factor reaches an average of 7.997 for the encrypted color lena-baboon images with an infinite peak signal-to-noise ratio (PSNR) for the decrypted images. The designed DnCNN operates efficiently with the proposed encryption scheme as it enhances the performance against the Gaussian noise, where the PSNR of the decrypted Lena image is enhanced from 27.01 dB to 32.56 dB after applying the DnCNN.| Open Access | |
| Advancements and Challenges in Hand Gesture Recognition: A Comprehensive Review | |
| Bothina Kareem Murad, and Abbas H. Hassin Alasadi | |
| Version of record online: 3 July 2024 | DOI: 10.37917/ijeee.20.2.13 | Full Text (PDF) | |
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Hand gesture recognition is a quickly developing field with many uses in human-computer interaction, sign language recognition, virtual reality, gaming, and robotics. This paper reviews different ways to model hands, such as vision-based, sensor-based, and data glove-based techniques. It emphasizes the importance of accurate hand modeling and feature extraction for capturing and analyzing gestures. Key features like motion, depth, color, shape, and pixel values and their relevance in gesture recognition are discussed. Challenges faced in hand gesture recognition include lighting variations, complex backgrounds, noise, and real-time performance.|
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