Page 291 - 2024-Vol20-Issue2
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287 |                                                                                                                            Abdulabbas & Salih

The solution to Eq. (3) can be given as follows:                            5

                                                                                                                                                                              V /V
                                                                            4 C1 in

                                                                                                                                                                              V /V

                                                                                                                                                                                                         C2 in

          1 - D0                                                            3                                                                     V /V
          1 - 2D0
                                                                                                                                                    DC in

VC1    =            Vin - VR

                                                                            2

VC2    =     D0     Vin  - VR                        (4)                    1
          1 - 2D0
                                                                            0
                       1 - D0
IL  =  IL1  =  IL2  =  1 - 2D0  Iload                                       -1

                                                                            -2

                                                                            -3

                                                                            -4

where       VR  =   (1  - D0) (r +     2D0R)  Iload                         -5
                          (1 - 2D0     )2                                      0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

                                                                                                                      D

                                                                                                                        o

                                                                   Fig. 3.  Plots between          VC1     ,  VC2  ,  and  VDC      with shoot through
                                                                                                   Vin        Vin          Vin
                                                                                                              ratio.
The maximum value of the DC voltage at the input terminals
of the inverter, denoted as VDC, can be determined using Eq.       qZSI and protects the circuit from damage [21].
(4)

VDC = VC1 + VC2 = BVin - 2VR                         (5)                    ? ˜iL1 ?
                                                                                ˜iL2
                                                                   d/dt     ?   v˜ C1  ?
                                                                            ?          ?
                                                                                       ?
                                                                            ?

                                                                                v˜ C2

                          1                                           ? -((r + R))/L                       0          -    1  (1  -  D0  )        1  D0                                                              ?
        Since B = 1 - 2D0 is the boost factor of the qZSI.                                                                 L                      L
                                                                                                         (r+R)
The currents flowing through the two inductors in the quasi-Z      =  ?             0                 -    L                  1  D0         -  1  (1  -                                                         D0)  ?
source network are identical at a stable condition. In addition,      ?                                                       L                L                                                                     ?
if we ignore the resistances that occur in capacitors and the               1       -                  -  1
unused resistances that occur in inductors, that is VR = 0 .          ?     C   (1     D0)                C   D0                 0                   0?
In the buck conversion mode of the qZSI, when the inverter
is fully active (as shown in Fig. 2, the diode will conduct,                    -  1  D0           1   (1  -  D0)                0                   0
and the voltage across capacitor C1 is going to be equal to                        C               C
the input voltage, while the voltage across capacitor C2 will
be zero as shown in Fig. 3. To increase VDC, one may keep             ? ˜IL1 ?         ?     R  (1  -    d0   )    1?
the six active states as they are and exchange some or all of                                L
the two conventional zero states with shoot-through states.              L˜ L2               R      -              L          ˜iLoad
The boost factor, denoted as B, is directly proportional to the          v˜ C1               L                                Vin
shoot-through duty ratio, as indicated in Eq. (5). The boost          ?         ?   +  ?        (1       d0   )    0?
conversion mode of the qZSI is the term used to describe this.        ?         ?      ?
                                                                      ?                      -  1  (1  -   d0)     0  ?
    The small-signal state equations can be derived by per-                     ??              L                     ?
turbing from the equilibrium point, as stated in Eq. (6). It is
observed from the small signal model that the response of the            v˜ C2               -  1  (1  -   d0)     0
inductance currents is different. Still, in the steady state, the                               L
response is similar (see Eq.(6)). These two cases in Z Source
Inverter (ZSI) are the same, so it increases the reliability of          ? (VC1 +VC2 -ILoadR) ?

                                                                                          L
                                                                            (VC1 +VC2 -ILoadR)
                                                                         ?                                 ?
                                                                                        L
                                                                      +  ?      (-2IL +ILoad )             ?  do
                                                                         ?                                 ?

                                                                         ?                                 ?

                                                                         ?C?
                                                                                   (-2IL +ILoad )

                                                                                          C

                                                                                                                                                        (6)

                                                                   2) Small Signal Transfer Functions
                                                                   Then achieve the needed power and enhance the capabilities,
                                                                   a closed-loop control system for the shoot-through duty cycle
                                                                   is created based on the previously derived small-signal volt-
                                                                   age and current model, neglecting the second-order elements.
                                                                   From a control viewpoint, the input voltage and load current
                                                                   disturbances can be seen as external disturbances that can
                                                                   be immediately compensated for by controllers, and hence,
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