In medium voltage and high-power drive applications, pulse width modulation (PWM) techniques are widely used to achieve effective speed control of AC motors. In real-time, an industrial drive system requires reduced hardware complexity and low computation time. The reliability of the AC drive can be improved with the FPGA (field programmable gate array) hardware equipped with digital controllers. To improve the performance of AC drives, a new FPGA-based Wavect real-time prototype controller (Xilinx ZYNQ-7000 SoC) is used to verify the effectiveness of the controller. These advanced controllers are capable of reducing computation time and enhancing the drive performance in real- time applications. The comparative performance analysis is carried out for the most commonly used voltage source inverter (VSI)-based PWM techniques such as sinusoidal pulse width modulation (SPWM) and space vector pulse width modulation (SVPWM) for three-phase, two-level inverters. The comparative study shows the SVPWM technique utilizes DC bus voltage more effectively and produces less harmonic distortion in terms of higher output voltage, flexible control of output frequency, and reduced harmonic distortion at output voltage for motor control applications. The simulation and hardware results are verified and validated by using MATLAB/Simulink software and FPGA-based Wavect real-time controller respectively.
Nowadays, renewable energy is being used increasingly because of the global warming and destruction of the environment. Therefore, the studies are concentrating on gain of maximum power from this energy such as the solar energy. A sun tracker is device which rotates a photovoltaic (PV) panel to the sun to get the maximum power. Disturbances which are originated by passing the clouds are one of great challenges in design of the controller in addition to the losses power due to energy consumption in the motors and lifetime limitation of the sun tracker. In this paper, the neuro-fuzzy controller has been designed and implemented using Field Programmable Gate Array (FPGA) board for dual axis sun tracker based on optical sensors to orient the PV panel by two linear actuators. The experimental results reveal that proposed controller is more robust than fuzzy logic controller and proportional- integral (PI) controller since it has been trained offline using Matlab tool box to overcome those disturbances. The proposed controller can track the sun trajectory effectively, where the experimental results reveal that dual axis sun tracker power can collect 50.6% more daily power than fixed angle panel. Whilst one axis sun tracker power can collect 39.4 % more daily power than fixed angle panel. Hence, dual axis sun tracker can collect 8 % more daily power than one axis sun tracker .
Audio encryption has gained popularity in a variety of fields including education, banking over the phone, military, and private audio conferences. Data encryption algorithms are necessary for processing and sending sensitive information in the context of secure speech conversations. In recent years, the importance of security in any communications system has increased. To transfer data securely, a variety of methods have been used. Chaotic system-based encryption is one of the most significant encryption methods used in the field of security. Chaos-based communication is a promising application of chaos theory and nonlinear dynamics. In this research, a chaotic algorithm for the new chaotic chameleon system was proposed, studied, and implemented. The chameleon chaotic system has been preferred to be employed because it has the property of changing from self-excited (SA) to hidden-attractor (HA) which increases the complexity of the system dynamics and gives strength to the encryption algorithm. A chaotic chameleon system is one in which, depending on the parameter values, the chaotic attractor alternates between being a hidden attractor and a self-excited attractor. This is an important feature, so it is preferable to use it in cryptography compared to other types of chaotic systems. This model was first implemented using a Field Programmable Gate Array (FPGA), which is the first time it has been implemented in practical applications. The chameleon system model was implemented using MATLAB Simulink and the Xilinx System Generator model. Self-excited, hidden, and coexisting attractors are shown in the proposed system. Vivado software was used to validate the designs, and Xilinx ZedBoard Zynq-7000 FPGA was used to implement them. The dynamic behavior of the proposed chaotic system was also studied and analysis methods, including phase portrait, bifurcation diagrams, and Lyapunov exponents. Assessing the quality of the suggested method by doing analyses of many quality measures, including correlation, differential signal-to-noise ratio (SNR), entropy, histogram analysis, and spectral density plot. The numerical analyses and simulation results demonstrate how well the suggested method performs in terms of security against different types of cryptographic assaults.
This article emphasizes on a strategy to design a Super Twisting Sliding Mode Control (STSMC) method. The proposed controller depends on the device of Field Programmable Gate Array (FPGA) for controlling the trajectory of robot manipulator. The gains of the suggested controller are optimized using Chaotic Particle Swarm Optimization (PSO) in MATLAB toolbox software and Simulink environment. Since the control systems speed has an influence on their stability requirements and performance, (FPGA) device is taken in consideration. The proposed control method based on FPGA is implemented using Xilinx block sets in the Simulink. Integrated Software Environment (ISE 14.7) and System Generator are employed to create the file of Bitstream which can be downloaded in the device of FPGA. The results show that the designed controller based of on the FPGA by using System Generator is completely verified the effectiveness of controlling the path tracking of the manipulator and high speed. Simulation results explain that the percentage improvement in the Means Square Error (MSEs) of using the STSMC based FPGA and tuned via Chaotic PSO when compared with the same proposed controller tuned with classical PSO are 17.32 % and 13.98 % for two different cases of trajectories respectively.
Everything in its way to be computerized and most of the objects are coming to be smart in present days. Modern Internet of Thing (IoT) allows these objects to be on the network by using IoT platforms. IoT is a smart information society that consists of smart devices; these devices can communicate with each other without human's intervention. IoT systems require flexible platforms. Through the use of Field Programmable Gate Array (FPGA), IoT devices can interface with the outside world easily with low power consumption, low latency, and best determinism. FPGAs provide System on Chip (SoC) technique due to FPGAs scalability which enables the designer to implement and integrate large number of hardware clocks at single chip. FPGA can be deemed as a special purpose reprogrammable processor since it can process signals at its input pins, manipulate them, and give off signals on the output pins. In this paper, using FPGA for IoT is the limelight.
The Fast Fourier Transform (FFT) and Inverse FFT(IFFT) are used in most of the digital signal processing applications. Real time implementation of FFT/IFFT is required in many of these applications. In this paper, an FPGA reconfigurable fixed point implementation of FFT/IFFT is presented. A manually VHDL codes are written to model the proposed FFT/IFFT processor. Two CORDIC-based FFT/IFFT processors based on radix-2and radix-4 architecture are designed. They have one butterfly processing unit. An efficient In-place memory assignment and addressing for the shared memory of FFT/IFFT processors are proposed to reduce the complexity of memory scheme. With "in-place" strategy, the outputs of butterfly operation are stored back to the same memory location of the inputs. Because of using DIF FFT, the output was to be in reverse order. To solve this issue, we have re-use the block RAM that used for storing the input sample as reordering unit to reduce hardware cost of the proposed processor. The Spartan-3E FPGA of 500,000 gates is employed to synthesize and implement the proposed architecture. The CORDIC based processors can save 40% of power consumption as compared with Xilinx logic core architectures of system generator.
Fuzzy PID controller design is still a complex task due to the involvement of a large number of parameters in defining the fuzzy rule base. To reduce the huge number of fuzzy rules required in the normal design for fuzzy PID controller, the fuzzy PID controller is represented as Proportional-Derivative Fuzzy (PDF) controller and Proportional-Integral Fuzzy (PIF) controller connected in parallel through a summer. The PIF controller design has been simplified by replacing the PIF controller by PDF controller with accumulating output. In this paper, the modified Fuzzy PID controller design for bench-top helicopter has been presented. The proposed Fuzzy PID controller has been described using Very High Speed Integrated Circuit Hardware Description Language (VHDL) and implemented using the Field Programmable Gate Array (FPGA) board. The bench-top helicopter has been used to test the proposed controller. The results have been compared with the conventional PID controller and Internal Model Control Tuned PID (IMC-PID) Controller. Simulation results show that the modified Fuzzy PID controller produces superior control performance than the other two controllers in handling the nonlinearity of the helicopter system. The output signal from the FPGA board is compared with the output of the modified Fuzzy PID controller to show that the FPGA board works like the Fuzzy PID controller. The result shows that the plant responses with the FPGA board are much similar to the plant responses when using simulation software based controller.