Cover
Vol. 16 No. 1 (2020)

Published: June 30, 2020

Pages: 78-84

Original Article

A Fast and Accurate Method for Power System Voltage Sag Detection

Abstract

In order to mitigate the effect of voltage sag on sensitive loads, a dynamic voltage restorer (DVR) should be used for this purpose. The DVR should be accompanied with a fast and accurate sag detection circuit or algorithm to determine the sag information as quickly as possible with an acceptable precision. This paper presents the numerical matrix method as a distinctive candidate for voltage sag detection. The design steps of this method are demonstrated in detail in this work. The simulation results exhibit the superiority of this technique over the other detection techniques in term of the speed and accuracy of detection, simplicity in implementation, and the memory size. The results also accentuate the recognition capability of the proposed method in distinguishing different types of voltage sag by testing three different voltage sag scenarios.

References

  1. H. J. Bollen, Understanding Power Quality Problems, 2nd ed., John Wiley & Sons, 2000, pp. 143-148.
  2. IEEE Recommended Practice for Monitoring Electric Power Quality, “IEEE Standard 1159-1995,” 1995.
  3. Y. Lu, G. Xiao, B. Lei, X. Wu, and S. Zhu, “A Transformer less Active Voltage Quality Regulator with the Parasitic Boost Circuit,” IEEE Transaction Power Electronics, vol. 29, no .4, pp. 1746-1756, April 2014.
  4. J. Praveen, P. Bishnu, M. S. Venkateshwarlu, and H. V. Makthal, “Review of dynamic voltage restorer for power quality improvement,” IEEE Industrial Electronics Society, vol. 1, no. 1 pp. 749–752, 2004.
  5. T. Jimichi, H. Fujita, and H. Akagi, “A dynamic voltage restorer equipped with a high-frequency isolated DC- DC converter,” IEEE Transactions on Industry Applications, vol. 47, no. 1, pp. 169–175, Jan./Feb. 2011.
  6. W. E. Brumsickle, R. S. Schneider, G. A. Luckjiff, D. M. Divan, and M. F. McGranaghan, “Dynamic Sag Correctors: Cost-Effective Industrial Power Line Conditioning,” IEEE Transactions on Industry Applications, vol. 37, no. 1, pp. 1339-1344, Feb. 2001.
  7. C. Z. Noronha, and S.B. Karapurkar, “Design of Active Voltage Regulator for Voltage Sag Mitigation,” GRD Journals, vol. 2, no. 4, pp. 85-95, 2017.
  8. M. V. K. Perera, Control of a Dynamic Voltage Restorer to Compensate Single Phase Voltage Sags, Stockholm University, 2007.
  9. C. Fitzer, M. Barnes and P. Green, “Voltage Sag Detection Technique for a Dynamic Voltage Restorer,” IEEE Transactions on Industry Applications, vol. 40, no. 1, pp. 203–212, Jan./Feb. 2004.
  10. M. Inci, M. Buyuk, and M. Tumay, “FFT based reference signal generation to compensate simultaneous voltage sag/swell and voltage harmonics,” IEEE 16th International Conference on Environment and Electrical Engineering (EEEIC), 2016.
  11. V. A. Skolota & G. S. Zinovev, ”Detecting Voltage Swell, Interruption and Sag,” IEEE 19th International Conference of Young Specialists on Micro/Nanotechnologies and Electron Devices (EDM), 2018.
  12. C. Prakash and N. Suparna, “Design and Simulation of Phase-Locked Loop Controller Based Unified Power Quality Conditioner Using Nonlinear Loads,” International Journal of Power Electronics and Drive System (IJPEDS), vol. 2, no. 4, pp. 417-423, 2012.
  13. A. K. Ramasamy, R. K. Iyer, R. N. Mukerjee, and V. K. Ramachandramurthy, “Dynamic Voltage Restorer for voltage sag compensation,”, IEEE Power Electronics and Drive Systems (PEDS), vol. 2, no.1, pp. 1289-1293, 2005.
  14. J. R. C. Pearanda and G. Ramos, “Characterization of voltage sags due to faults in radial systems using three- phase voltage ellipse parameters,” IEEE Transactions on Industry Applications, vol. 54, no. 3, pp. 2032 - 2040, 2018.
  15. J. G. Nielsen, M. Newman, H. Nielsen, F. Blaabjerg, ”Control and testing of a Dynamic Voltage Restorer at medium voltage level,” IEEE transactions on Power Electronics, vol. 19, no. 3, pp. 806-813, May 2004.
  16. F. R. Zaro, M. A. Abido, “Real-Time Detection and Classification for Voltage Events Based on Wavelet Transform,” IEEE Jordan International Joint Conference on Electrical Engineering and Information Technology (JEEIT), 2019.
  17. A. R. Diwan and K. M. Abdulhasan, “Proposed Topology for Voltage Sag Mitigation with New Control Strategy,” Iraqi Journal of Electrical and Electronic Engineering vol. 15, no. 2, pp. 138-144, 2019.
  18. M. Manjula, A. V. R. S. Sarma, and S. Mishra, “Detection and Classification of Voltage Sag Causes based on Empirical Mode Decomposition,” Annual IEEE India Conference, 2011.
  19. D. V. Tien, R. Gono, and Z. Leonwicz, ”Analysis and Simulation the Causes of Voltage Sags Using EMTP,” IEEE International Conference on Environment and Electrical Engineering, 2017.
  20. C. Li, J. Yang, Y. Xu, Y. Wu, and P. Wei, ” Classification of voltage sag disturbance source using fuzzy comprehensive evaluation method,” IET Journals, 24th International Conference & Exhibition on Electricity Distribution, 2017.