Page 127 - IJEEE-2023-Vol19-ISSUE-1
P. 127

Al-Atbee, Kadhem, Harden, & Abdulhassan                                                                                         | 123

outperforms the traditional cascaded multilevel inverter.         harmonic distortion." Bulletin of Electrical Engineering
                                                                  and Informatics, Vol. 11.2, pp. 672-680, 2022.
Using the suggested control strategy, a 15-level output           doi:10.11591/eei.v11i2.3466.
                                                                [11] Vemula Anil Kumar, and Arounassalame Mouttou,
voltage produced with lower THD. The simulation findings          "Improved performance with fractional order control for
                                                                  asymmetrical cascaded H-bridge multilevel inverter."
show that the new configuration is more effective than the        Bulletin of Electrical Engineering and informatics, Vol. 9,
                                                                  no. 4, pp. 1335-1344, 2020.
inverters that were previously employed.                        [12] Osama Y. K. Al-Atbee, and Khalid M. Abdulhassan. "A
                                                                  cascade multi-level inverter topology with reduced
                     CONFLICT OF INTEREST                         switches and higher efficiency." Bulletin of Electrical
                                                                  Engineering and Informatics, Vol. 12, no. 2, pp. 668-676,
     The authors have no conflict of relevant interest to this    2023. doi.org/10.11591/eei.v12i2.4138.
article.                                                        [13] M. S. Arif, S. M. Ayob, Z. Salam, "Asymmetrical Nine-
                                                                  Level Inverter Topology with Reduce Power
                             REFERENCES                           Semiconductor Devices," Telecommunication Computing
                                                                  Electronics and Control, vol. 16, no. 1, pp. 38-45, Feb
[1] G. Durga, V. Jegathesan, P. V. V. Rama Rao, "Hybrid           2018.
  multilevel DC link inverter with reduced power electronic     [14] C. R. Balamurugan, and K. Vijayalakshmi,
  switches," 2017 Energy Procedia, Vol. 117, pp.626-634,          "Comparative analysis of various z-source based five level
  2017. doi.org/10.1016/j.egypro.2017.05.162                      cascaded H-bridge multilevel inverter." Bulletin of
                                                                  Electrical Engineering and Informatics, Vol. 7, no. 1, pp.
[2] A. Prayag and S. Bodkhe, "A comparative analysis of           1-14, 2018.
  classical three phase multilevel (five level) inverter        [15] C. Dhanamjayulu and S. Meikandasivam,
  topologies," 2016 IEEE 1st International Conference on          "Implementation and Comparison of Symmetric and
  Power Electronics, Intelligent Control and Energy               Asymmetric Multilevel Inverters for Dynamic Loads," in
  Systems (ICPEICES), pp. 1-5, 2016. doi:                         IEEE Access, vol. 6, pp. 738-746, 2018. doi:
  10.1109/ICPEICES.2016.7853567.                                  10.1109/ACCESS.2017.2775203

[3] P. Qashqai, A. Sheikholeslami, H. Vahedi and K. Al-
  Haddad, "A Review on Multilevel Converter Topologies
  for Electric Transportation Applications," 2015 IEEE
  Vehicle Power and Propulsion Conference (VPPC),
  Montreal, QC, Canada, pp. 1-6, 2015. doi:
  10.1109/VPPC.2015.7352882

[4] A. Kahwa, H. Obara and Y. Fujimoto, "Design of 5-
  level reduced switches count ?-bridge multilevel
  inverter," 2018 IEEE 15th International Workshop on
  Advanced Motion Control (AMC), pp. 41-46, 2018. doi:
  10.1109/AMC.2019.8371060.

[5] A. K. Koshti and M. N. Rao, "A brief review on
  multilevel inverter topologies," 2017 International
  Conference on Data Management, Analytics and
  Innovation (ICDMAI), pp. 187-193, 2017. doi:
  10.1109/ICDMAI.2017.8073508.

[6] Balapriyan, P. Veeraragavan, K.," Design and analysis
  of 7-level inverter at different modulation indices with a
  closed loop control," International Journal of Pure and
  Applied Mathematics, pp. 637-641, 2018.

[7] P. Roseline, B. Ramesh, Ch. V. V. Manga Lakshmi, "
  Performance Analysis of Twenty Seven Level
  Asymmetrical Cascaded H-Bridge Multi Level Inverter
  Fed Three Phase Induction Motor Drive," International
  Journal of Engineering and Advanced Technology
  (IJEAT), Vol. 4, Issue 1, October 2014.

[8] P. Omer, J. Kumar and B. S. Surjan, "A Review on
  Reduced Switch Count Multilevel Inverter Topologies," in
  IEEE Access, vol. 8, pp. 22281-22302, 2020. doi:
  10.1109/ACCESS.2020.2969551

[9] J. Rodriguez, Jih-Sheng Lai and Fang Zheng Peng,
  "Multilevel inverters: a survey of topologies, controls, and
  applications," in IEEE Transactions on Industrial
  Electronics, vol. 49, no. 4, pp. 724-738, Aug. 2002. doi:
  10.1109/TIE.2002.801052

[10] Abdulhassan, K. M., Osama Y. K. Al-Atbee. "Improved
  modified a multi-level inverter with a minimum total
   122   123   124   125   126   127   128