Cover
Vol. 9 No. 1 (2013)

Published: December 31, 2013

Pages: 16-28

Original Article

A Multiplier-less Implementation of Two-Dimensional Circular-Support Wavelet Transform on FPGA

Jassim M. Abdul-Jabbar 1 Zahraa Talal Abede Akram A. Dawood
1Department of Computer Engineering, College of Engineering, University of Mosul, Mosul, Iraq.
History
  • Received: October 31, 2013
  • Available Online: December 31, 2013
DOI

https://doi.org/10.37917/ijeee.9.1.2

Abstract

In this paper, a two-dimensional (2-D) circular-support wavelet transform (2-D CSWT) is presented. 2-D CSWT is a new geometrical image transform, which can efficiently represent images using 2-D circular spectral split schemes (circularly- decomposed frequency subspaces). 2-D all-pass functions and lattice structure are used to produce 1-level circular symmetric 2-D discrete wavelet transform with approximate linear phase 2-D filters. The classical one-dimensional (1-D) analysis Haar filter bank branches H 0 (z) and H 1 (z) which work as low-pass and high-pass filters, respectively are transformed into their 2-D counterparts H 0 (z 1 ,z 2 ) and H 1 (z 1 ,z 2 ) by applying a circular-support version of the digital spectral transformation (DST). The designed 2-D wavelet filter bank is realized in a separable architecture. The proposed architecture is simulated using Matlab program to measure the deflection ratio (DR) of the high frequency coefficient to evaluate its performance and compare it with the performance of the classical 2-D wavelet architecture. The correlation factor between the input and reconstructed images is also calculated for both architectures. The FPGA (Spartan-3E) Kit is used to implement the resulting architecture in a multiplier-less manner and to calculate the die area and the critical path or maximum frequency of operation. The achieved multiplier-less implementation takes a very small area from FPGA Kit (the die area in 3-level wavelet decomposition takes 300 slices with 7% occupation ratio only at a maximum frequency of 198.447 MHz).

Keywords

References

  1. M. A. Mirzaei, “Acceleration of Face Detection Algorithm on an FPGA”, M. Sc. Thesis in Vision and Robotics (VIBOT), University Centre Condorcet, University of Bourgogne, France, Group of Circuit and Systems, Department of Electronics Engineering, June 2011.
  2. A. Schreiner,“ Image Processing Techniques for Face Recognition” University of Wisconsin Madison- ECE 533 Project, 2006.
  3. K. H. Talukder, K. Harada, “Haar Wavelet Based Approach for Image Compression and Quality Assessment of Compressed Journal of Applied Mathematics- IJAM, Vol. 36, No. 1, 2007.
  4. C. Xiong, J. Tian, and J. Liu, “Efficient Architectures for TwoDimensional Discrete Wavelet Transform using Lifting Scheme", IEEE Transactions on Image Processing, Vol. 16, No. 3, pp. 607 – 614, March 2007.
  5. C. Cheng, and K. K. Parhi, “ HighSpeed VLSI Implementation of 2-D Discrete Wavelet Transform,” IEEE Transactions on Signal Processing, Vol. 56, No. 1, pp. 393- 403, Jan. 2008.
  6. J. M. Abdul-Jabbar and Z. N. Abdulkader, ” Iris Recognition using 2-D Elliptical–Support Wavelet Filter Bank”, Conference on Processing Theory, Tool and Applications- IPTA 2012, Istanbul, Turkey, 15-18 Oct., pp. 359 – 363, 2012.
  7. J. M. Abdul-Jabbar and H. N. Fathee, “Design and Realization of Circular Contourlet Transform”, Al-Rafidain Engineering Journal, Vol. 18, No. 4, pp. 28 - 42, Aug. 2010.
  8. M. Vishwanath, R. M. Owens, and M. J. Irwin, “VLSI Architectures for The Discrete Wavelet Transform”, IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, Vol. 42, No. 5, pp. 305–316, May 1995.
  9. Chao-T. Huang, Po-C. Tseng, and Liang-G. Chen, “Analysis and VLSI Architecture for 1-D and 2-D Discrete Wavelet Transform”, IEEE Transactions on Signal Processing, Vol. 53, No. 4, pp. 1575-1586, April 2005.
  10. B. K. Mohanty, A. Mahajan and P. K. Meher, “Area and Power- Efficient Architecture for High-Throughput Systems-II, express brief , May 2012.
  11. D. Sowjanya, K. N. H. Srinivas and P. Venkata “FPGA Of Efficient VLSI Architecture for Fixed Point 1-D DWT using Lifting Scheme” VLSI Communication Systems (VLSICS) Vol. 3, No. 4, pp. 37-48, Aug. 2012.
  12. T. C. Denk and K. K. Parhi , “ VLSI Architectures for Lattice Structure Based Orthonormal Discrete Wavelet Transforms”, IEEE Transactions on Circuits And Systems-II: Analog and Digital Signal Processing, Vol. 44, No. 2, pp. 129-132, Feb. 1997.
  13. M. N. Kumar, J. Hemanth and K. D. Prasad, “VLSI Implementation of DWT Using Systolic Array Architecture”, Journal of Recent Technology and Engineering (IJRTE), Vol. 1, Issue-4, pp. 67-73, Oct. 2012.
  14. J. Fridman and E. Manolakos, “Distributed Memory and Control VLSI Architectures for The 1-D Discrete Wavelet Transform,” in VLSI Signal Processing, VII, pp. 388–397, 1994.
  15. R. Jain and P. R. Panda, “Memory Architecture Exploration for PowerEfficient 2D-Discrete Wavelet Transform” Conference Proceedings: 20th VLSI Design - 6th Embedded Systems, pp. 813 – 818, Jan. 2007.
  16. M. I. Mahmoud, M. I. M. Dessouky, S. Deyab, and F. H. Elfouly, “Comparison between Haar and Daubechies Wavelet Transformations on FPGA Technology”, World Academy of Science, Engineering and Technology, Vol. 26, pp. 68-72, 2007.
  17. S. Alseyab, O. A. Al Heyasat and J. M. Abdul-Jabbar, “Design of 2-D IIR filter with linear phase using modified digital spectral transformation” Alexandria Engineering Journal, Faculty of Engineering Alexandria University, Egypt, Vol. 44, No. 6, pp. 865-881, 2005.
  18. B. A. Shenoi and P. Misra, “Design of Two–Dimensional IIR Digital Filter with Linear Phase," IEEE Trans. Circuits Syst.– II: Analog and Digital Signal Process., Vol. 42 (2), pp. 124-129, 1995.
  19. M. Mastriani, A. E. Giraldez," Smoothing of Coefficients in Wavelet Domain for Speckle Reduction Synthetic Aperture Radar Images", The Congress for Science and Technology (ICGST), and Image Processing (GVIP), GVIP, Special Issue on Denoising, pp.1-8, 2007. www.icgst.com
  20. M. Mastriani and A. E. Giraldez," Kalman’s Shrinkage for Wavelet-Based De-speckling of SAR Journal Of Technology, Vol. 1, No. 3, pp. 190-196, 2006.