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in Fig. 2, where it involves of two sub control strategy, one
to each joint of the robot manipulator. As shown in Fig. 2,
the proposed controller is designed using Xilinx block. In the
proposed controller, STSMC is employed to limit the output
chattering problem as well as the nonlinearity. The controller
is designed for controlling the torque which produces through
the rotary actuators on the robot joint.
The sliding surface at each joint for the vector s = [s1 s2]T
can be represented as:
s = e? + ce (7)
Where, the error (e) is the difference between the desired and
actual positions (qd and q) respectively, where, e = qd - q,
and the variable (c) is an integer positive parameter. The
equation (4) may be derived to give the following relation:
s? = e¨ + ce? = q¨d - q¨ + c(q?d - q?) (8)
Substituting equation (5) into (8), we have:
s? = c(q?d -q?)+q¨ -M(q)-1[u-C(q, q?)q? -G(q)-F(q?)-ud]
(9)
The control signal (u) of the STSMC method consists from
two terms, the first one refers to the switching (usw) and
the other is the equivalent (ueq), so, the control input can be
represented by:
u = M(q)(usw + ueq) (10)
The equivalent law can be denoted as:
ueq = c(q?d - q?) + q¨ - M(q)-1C(q, q?)q? + M(q)-1G(q) (11)
The switching law design is derived from the control law [22]
and written as:
uswi = -ki |si|sign(si) - bi sign(si)dt (12)
Where, i = 1, 2 and refers to each joint of the robot manipu-
lator and the parameters (ki,bi > 0). The control signal law
can be obtained by substituting the equations (11) and (12) in
equation (10), so the final control output follows:
u = M(q)[c(q?d - q?) + q¨ - M(q)-1C(q, q?)q? + (13)
M(q)-1G(q) + uswi]
Substituting the equations (13) in equation (9) to get:
s? = [-k1 |s1|sign(s1) - b1 sign(s1)dt (14)
-k2 |s2|sign(s2) - b2 sign(s2)dt] + z
Abdul Zahra & Wali
Where, z=[z1 z2]T = (M(q)-1F)T . In order to achieve the sta-
bility requirements in designing the STSMC method, the Lya-
punov criteria method is applied. The derivative of quadratic
Lyapunov function (V = 1 ssT ) is denoted in the sliding sur-
2
faces term as 23:
V? = s1s?1 + s2s?2 (15)
Merging the equations (14) and (15) to be:
V? = s1[k1 |s1|sign(s1) - b1 sign(s1)dt + z1]
+s2[k2 |s2|sign(s2) - b2 sign(s2)dt + z2]
Or, the term can be defined as:
V? = -k1 |s1||s1|-|s1| b1dt + |s1|z1
-k2 |s2||s2|-|s2| b2dt + |s2|z2
(16)
V? = -k1 |s1||s1|-|s1| (b1 - d1)dt (17)
-k2 |s2||s2|-|s2| (b2 - d2)dt
The stabilization requirements to track the path of the robot
manipulator will guaranteed if both (b1and b2) have values
achieving (b1 > d1 > |b?1| and b2 > d2 > |b?2|). Achieving the
conditions (V ) is a positive definite while (V? ) is a negative
definite for (t 0). Also, the sliding surfaces will converge to
zero values as (t 8).
The System Generator represents a Xilinx toolbox which
can generate the Hardware Description Language (HDL) code
in the Simulink environment automatically. The parameters
of STSMC scheme is optimized using the Chaotic PSO al-
gorithm to evaluate the controller output results. Then the
controller is designed using Xilinx block sets which supported
in Simulink environment as shown in Fig. 3. The quantization
size of the block sets of the inputs is computed by in Gate-
way. Similarly, the size of output is implemented as Mult and
AddSub blocks. In these blocks, the FPGA device type has
been selected, clock period of FPGA, the kind of generated
code (VHDL or Verilog) and other different desired features.
By implementation the STSMC method in any (FPGA) kit
system, the FPGA boundary dependent on the architecture
by using the (In) and (Out) gateways. The function of Gate-
way block (In) is represented by conversion the floating point
into fixed- point, where that FPGA will process it. The Gate-
way block (Out) translates the data of FPGA into floating
point [24].